Fabrication of stacked microelectronic devices
US6896760B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2002 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Jun 13, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/1495
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Manufacture of stacked microelectronic devices is facilitated by producing subassemblies wherein adhesive pads are applied to the back surfaces of a plurality of microelectronic components in a batch fashion. In one embodiment, an adhesive payer is applied on a rear surface of a wafer. A plurality of spaced-apart adhesive pads are defined within the adhesive layer. Each adhesive pad may cover less than the entire back surface area of the component to which it is attached. A mounting member (e.g., dicing tape) may be attached to the adhesive layer and, in some embodiments, the adhesive layer may be treated so that the mounting member is less adherent to the adhesive pads than to other parts of the adhesive layer, easing removal of the adhesive pads with the microelectronic components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.