Semiconductor power device having a diamond shaped metal interconnect scheme
US6897561B2 · kind B2 · utility
16Cited by
13References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2003 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Aug 1, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor (10) is formed as a matrix of transistor cells (13) that have drain metal strips (50) for contacting drains (15) of the transistor cells and source metal strips (55) for contacting sources (35) of the transistor cells. An interconnect layer (1030) overlying the matrix of transistor cells has first portions (201) that contact one the drain metal strips with first and second vias (79) and second portions (101) that contact one of the source metal strips with third and fourth vias (78).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.