Voltage supply distribution architecture for a plurality of memory modules
US6897710B2 · kind B2 · utility
3Cited by
4References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2003 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Dec 30, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An architecture for distributing supply voltages to a plurality of memory modules supplied through a plurality of charge pump circuits may include a sorting block bi-directionally connected to the plurality of memory modules, from which it may receive a plurality of power requests. The sorting block may provide a sorting signal based upon a priority scale to drive the plurality of charge pump circuits and distribute supply voltages to the plurality of memory modules. The architecture may advantageously be software-configurable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.