Multi-layer integrated circuit package
US6899815B2 · kind B2 · utility
4Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2002 |
| Grant date | May 31, 2005 |
| Priority date | — |
| Expiry date | May 10, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49128
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Adhesive material is applied to a surface of a metallic core layer. The adhesive material is removed from a conductive region of the metallic core layer. A metallic contact is provided over the conductive region of the metallic core layer. The metallic core layer is laminated to an imprinted buildup layer, the buildup layer having a dielectric region and a conductive region, wherein a nonconductive region of the metallic core layer is bonded to the dielectric region of the buildup layer and the conductive region of the metallic core layer is bonded to the conductive region of the imprinted-buildup layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.