METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING PLURAL SEMICONDUCTOR CHIPS, WHEREIN ELECTRODES OF THE SEMICONDUCTOR CHIPS ARE ELECTRICALLY CONNECTED TOGETHER VIA WIRING SUBSTRATES OF THE SEMICONDUCTOR CHIPS
US6900074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2003 |
| Grant date | May 31, 2005 |
| Priority date | — |
| Expiry date | Apr 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.