SiGe strain relaxed buffer for high mobility devices and a method of fabricating it
US6906400B2 · kind B2 · utility
25Cited by
1References
35Claims
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Key dates
| Filing date | Jan 13, 2004 |
| Grant date | Jun 14, 2005 |
| Priority date | — |
| Expiry date | Jan 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/751
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided comprising a semiconductor substrate having on its top a Thin Strain Relaxed Buffer. The Thin Strain Relaxed Buffer consists of a stack of three layers of essentially constant Ge concentration. The three layers include a first epitaxial layer of Si1-xGex, a second epitaxial layer of Si1-xGex:C, and a third epitaxial layer of Si1-xGex on the second epitaxial layer. A method to fabricate such a buffer is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.