Patent · US Expired

Method for performing an alignment measurement of two patterns in different layers on a semiconductor wafer

US6908775B2 · kind B2 · utility

8Cited by
9References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 14, 2003
Grant dateJun 21, 2005
Priority date
Expiry dateNov 14, 2023

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T2207/30148
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In an alignment or overlay measurement of patterns on a semiconductor wafer an error that occurs during the measurement in one of a predefined number of alignment structures in an exposure field of a corresponding predefined set of exposure fields can be handled by selecting an alignment structure in a substitute exposure field. The latter exposure field need not be part of the predefined set of exposure fields, that is, an inter-field change may be effected. The number of alignment measurements on a wafer remains constant and the quality is increased. Alternatively, when using another alignment structure in the same exposure field—by effecting an intra-field change—the method becomes particularly advantageous when different minimum structure sizes are considered for the substitute targets. Due to the different selectivity in, say, a previous CMP process, such targets might not erode and do not cause an error in a measurement, thus providing an increased alignment or overlay quality.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.