Trench-capacitor DRAM cell having a folded gate conductor

US6909136B2 · kind B2 · utility

Assignee

• NANYA TECHNOLOGY CORPORATION · TW

Inventors

• Yinan Chen · Taipei, TW
• Ming-Cheng Chang · Daxi District, TW
• Jeng-Ping Lin · Taoyuan, TW
• Tse-Yao Huang · Taipei, TW
• Change-Rong Wu · Taipei, TW
• Hui-Min Mao · Taipei, TW

Key dates

• Filing date: Jul 14, 2003
• Grant date: Jun 21, 2005
• Expiry date: Dec 30, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/665

Abstract

A novel trench-capacitor DRAM cell structure is disclosed. The trench-capacitor DRAM cell of this invention includes an active area island having a horizontal semiconductor surface and a vertical sidewall contiguous with the horizontal semiconductor surface. A pass transistor is disposed at the corner of the active area island. The pass transistor includes a folded gate conductor strip extending from the horizontal semiconductor surface to the vertical sidewall of the active area island, a source formed in the horizontal semiconductor surface, a drain formed in the vertical sidewall, and a gate oxide layer underneath the folded gate conductor strip. The source and drain define a folded channel. The trench-capacitor DRAM cell further includes a trench capacitor that is insulated from the folded gate conductor strip by a trench top oxide (TTO) layer and is coupled to the pass transistor via the drain.