Multi-height FinFETS
US6909147B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2003 |
| Grant date | Jun 21, 2005 |
| Priority date | — |
| Expiry date | Jul 9, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/405
Abstract
The present invention provides a FinFET device that has a first fin and a second fin. Each fin has a channel region and source and drain regions that extend from the channel region. The fins have different heights. The invention has a gate conductor positioned adjacent the fins. The gate conductor runs perpendicular to the fins and crosses the channel region of each of the first fin and second fin. The fins are parallel to one another. The ratio of the height of the first fin to the height of the second fin comprises a ratio of one to 2/3. The ratio is used to tune the performance of the transistor and determines the total channel width of the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.