Inventor · South Burlington, VT, US

BethAnn Rainey

24Patents
10h-index
49Co-inventors
67Inventor score

Filing activity: Dec 19, 2002 → Nov 28, 2011

Most-cited inventions

PatentTitleAreaCited byStatus
US6794718B2 High mobility crystalline planes in double-gate CMOS technology Electricity 198 Expired
US7115920B2 FinFET transistor and circuit Electricity 163 Expired
US6909147B2 Multi-height FinFETS Electricity 120 Expired
US6888199B2 High-density split-gate FinFET Electricity 63 Expired
US6992354B2 FinFET having suppressed parasitic device characteristics Electricity 27 Expired
US8021943B2 Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technology Electricity 19 Active
US7288802B2 Virtual body-contacted trigate Electricity 14 Expired
US6869852B1 Self-aligned raised extrinsic base bipolar transistor structure and method Electricity 13 Expired
US6953726B2 High-density split-gate FinFET Electricity 11 Expired
US6965133B2 Method of base formation in a BiCMOS process Electricity 10 Expired
US7087506B2 Method of forming freestanding semiconductor layer Electricity 10 Expired
US7904868B2 Structures including means for lateral current carrying capability improvement in semiconductor devices Electricity 7 Active
US7700446B2 Virtual body-contacted trigate Electricity 6 Active
US8748285B2 Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate Electricity 4 Active
US7470578B2 Method of making a finFET having suppressed parasitic device characteristics Electricity 3 Expired
US7368355B2 FinFET transistor and circuit Electricity 3 Active
US8778737B2 Flattened substrate surface for substrate bonding Electricity 3 Active
US7390721B2 Methods of base formation in a BiCMOS process Electricity 3 Active
US7453151B2 Methods for lateral current carrying capability improvement in semiconductor devices Electricity 2 Active
US7709892B2 Semiconductor device having freestanding semiconductor layer Electricity 2 Active
US7964466B2 FinFET transistor and circuit Electricity 1 Active
US8227318B2 Integration of multiple gate oxides with shallow trench isolation methods to minimize divot formation Electricity 1 Active
US7777276B2 FinFET transistor and circuit Electricity 0 Active
US7814454B2 Selectable device options for characterizing semiconductor devices Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.