Method and configuration for the output of bit error tables from semiconductor devices

US6910163B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Thomas Janik · Hersbruck, DE
• Sebastian Kuhne · Radebeul, DE
• Roderick McConnell · Munich, DE
• Detlev Richter · Unterhaching, DE
• Wolfgang Anton Spirkl · Germering, DE

Key dates

• Filing date: Jul 31, 2002
• Grant date: Jun 21, 2005
• Expiry date: Nov 20, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C29/48
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method and a configuration for the output of bit error tables from semiconductor devices are described. A test control unit reads the bit error table from the memory device following a request from the test apparatus. Then, the bit error tables are transmitted sequentially to the test apparatus for further processing.