Apparatus and method for incorporating driver sizing into buffer insertion using a delay penalty estimation technique
US6915496B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2002 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Jan 14, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for incorporating driver sizing into buffer insertion such that the two optimization techniques are performed simultaneously are provided. The apparatus and method extends van Ginneken's algorithm to handle driver sizing by treating a source node as a “driver library.” With the apparatus and method, the circuit design is converted to a Steiner tree representation of the circuit design. Buffer insertion is performed on the Steiner tree using the van Ginneken algorithm to generate a first set of possible optimal solutions. For each solution in the first set, a driver of the same type as the original driver in the Steiner tree is selected from a driver library and virtually inserted into the solution. A delay penalty is retrieved for the selected driver, which is then used long with the new driver's characteristics to generate a second set of solutions based o the first set of solutions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.