Method for testing a plurality of devices disposed on a wafer and connected by a common data line
US6917214B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2002 |
| Grant date | Jul 12, 2005 |
| Priority date | — |
| Expiry date | Oct 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method for testing a plurality of devices, which are arranged on a wafer and connected to a common data line, wherein the devices are connectable to a test unit via the common data line, a connection is separated first between a defective device and the common data line, or an internal connection in the defective device is separated. Subsequently, the remaining devices are tested. Alternatively, instead of the connection between the defective device and the common data line, the connection between a defective device and a common or an individual supply line is separated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.