Method of manufacturing semiconductor resin molding and resin member employed therefor
US6919223B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 2003 |
| Grant date | Jul 19, 2005 |
| Priority date | — |
| Expiry date | Jul 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A space portion is present between the upper surface of a semiconductor chip of a semiconductor chip mounted substrate fitted into a cavity (concave portion for setting) of a lower mold section and the top surface of a cavity of an upper mold section. The upper and lower mold sections are closed while a resin member having a thickness larger than the height of the space portion is inserted in the space portion. At this time, clamping force between the upper and lower mold sections is applied to the semiconductor chip through the resin member. The resin member is deformed in response to the shape of the space portion. Underfill is molded between the semiconductor chip and the substrate while the resin member adheres to both of the upper surface of the semiconductor chip and the top surface of the cavity of the upper mold section. Consequently, the underfill resin is prevented from flowing into a clearance between the upper surface of the semiconductor chip and the top surface of the cavity of the upper mold section. Thus, the upper surface of the semiconductor chip is prevented from formation of a resin molding flash.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.