Surface mount multichip devices
US6919625B2 · kind B2 · utility
9Cited by
16References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2003 |
| Grant date | Jul 19, 2005 |
| Priority date | — |
| Expiry date | Jul 16, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/916
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane, with at least one semiconductor chip being placed on each of the header regions. A conductive member link is placed on top of the two chips to electrically and mechanically interconnect the chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.