Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
US6925007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2002 |
| Grant date | Aug 2, 2005 |
| Priority date | — |
| Expiry date | Nov 7, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/947
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Non-volatile memory cells store a level of charge corresponding to the data being stored in a dielectric material storage element that is sandwiched between a control gate and the semiconductor substrate surface over channel regions of the memory cells. More than two memory states are provided by one of more than two levels of charge being stored in a common region of the dielectric material. More than one such common region may be included in each cell. In one form, two such regions are provided adjacent source and drain diffusions in a cell that also includes a select transistor positioned between them. In another form, NAND arrays of strings of memory cells store charge in regions of a dielectric layer sandwiched between word lines and the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.