Method for making programmable resistance memory element
US6927093B2 · kind B2 · utility
7Cited by
2References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2004 |
| Grant date | Aug 9, 2005 |
| Priority date | — |
| Expiry date | Mar 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of making an electrically operated programmable resistance memory element. A sidewall spacer is used as a mask to form a raised portion of a conductive layer. A programmable resistance material is formed in electrical contact with the raised portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.