Nonvolatile semiconductor memory device having element isolating region of trench type
US6927449B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2004 |
| Grant date | Aug 9, 2005 |
| Priority date | — |
| Expiry date | Nov 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device of a selective gate region having a semiconductor layer, a first insulating film formed on the semiconductor layer, a first electrode layer formed on the first insulating film, and an element isolating region including an element isolating insulating film formed to extend through the first electrode layer and the first insulating film to reach an inner region of the semiconductor layer. The element isolating region isolates an element region and is self-aligned with the first electrode layer, a second insulating film is formed on the first electrode layer and the element isolating region, and an open portion exposes a surface of the first electrode layer and is formed in the second insulating film. A second electrode layer is formed on the second insulating film and the exposed surface of the first electrode layer, the second electrode layer being electrically connected to the first electrode layer via the open portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.