Method of manufacturing a semiconductor component
US6930027B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2003 |
| Grant date | Aug 16, 2005 |
| Priority date | — |
| Expiry date | Sep 12, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor component includes forming a first electrically insulating layer (120) and a second electrically insulating layer (130) over a semiconductor substrate (110). The method further includes etching a first trench (140) and a second trench (150) through the first and second electrically insulating layers and into the semiconductor substrate, and etching a third trench (610) through a bottom surface of the second trench and into the semiconductor substrate. The third trench has a first portion (920) and a second portion (930) interior to the first portion. The method still further includes forming a third electrically insulating layer (910) filling the first trench and the first portion of the third trench without filling the second portion of the third trench, and also includes forming a plug layer (1010) in the second portion of the third trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.