Power savings in active standby mode
US6930949B2 · kind B2 · utility
18Cited by
8References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 26, 2002 |
| Grant date | Aug 16, 2005 |
| Priority date | — |
| Expiry date | Oct 6, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for reducing the power consumed by a memory device selectively activates a power saving mode in which operation of a delay compensation circuit may be suspended during an active power down mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.