Semiconductor substrate with trenches of varying depth
US6932916B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2003 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Jun 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching trenches having different depths on a semiconductor substrate includes providing a mask with first and second openings. The first and second openings are located where corresponding first and second trenches are to be etched. A slow-etch region, made of a slow-etch material, is provided above the substrate at a location corresponding to the second opening. When exposed to a selected etchant, the slow-etch material is etched at a rate less than the rate at which the semiconductor substrate is etched when exposed to the selected etchant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.