Scheduler for use in a microprocessor that supports data-speculative execution
US6950925B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2002 |
| Grant date | Sep 27, 2005 |
| Priority date | — |
| Expiry date | Dec 18, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3842
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor may include several execution units and a scheduler coupled to issue operations to at least one of the execution units. The scheduler may include several entries. A first entry may be allocated to a first operation. The first entry includes a source status indication for each of the first operation's operands. Each source status indication indicates whether a value of a respective one of the first operation's operands is speculative. The scheduler is configured to update one of the first entry's source status indications to indicate that a value of a respective one of the first operation's operands is non-speculative in response to receiving an indication that a value of a result of a second operation is non-speculative.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.