Method of forming a metal layer over patterned dielectric by electroless deposition using a catalyst

US6951816B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Markus Nopper · Dresden, DE
• Axel Preusse · Radebeul, DE

Key dates

• Filing date: Jun 24, 2003
• Grant date: Oct 4, 2005
• Expiry date: Aug 29, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2221/1089
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A metal layer is formed by means of an electroless plating process, wherein a surface region of an underlying material is catalytically activated in that a catalyst is deposited or incorporated by CVD, PVD or ALD during and/or after the deposition of the underlying material. In this way, superior metal seed layers may be formed even in high aspect ratio vias of metallization structures.