Cu interconnects with composite barrier layers for wafer-to-wafer uniformity

US6952052B1 · kind B1 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Amit P. Marathe · Milpitas, US
• Connie P. Wang · Irvine, US
• Christy Mei-Chu Woo · Cupertino, US

Key dates

• Filing date: Mar 30, 2004
• Grant date: Oct 4, 2005
• Expiry date: Mar 30, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76846
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A composite α-Ta/ graded tantalum nitride /TaN barrier layer is formed in Cu interconnects with a structure designed for improved wafer-to-wafer uniformity, electromigration resistance and reliability, reduced contact resistance, and increased process margin. Embodiments include a dual damascene structure in a low-k interlayer dielectric comprising Cu and a composite barrier layer comprising an initial layer of TaN on the low-k material, a graded layer of tantalum nitride on the initial TaN layer and a continuous α-Ta layer on the graded tantalum nitride layer. Embodiments include forming the initial TaN layer at a thickness sufficient to ensure deposition of α-Ta, e.g., as at a thickness of bout 50 Å to about 100 Å. Embodiments include composite barrier layers having a thickness ratio of α-Ta and graded tantalum nitride: initial TaN of about 2.5:1 to about 3.5:1 for improved electromigration resistance and wafer-to-wafer uniformity.