Integrated system for processing semiconductor wafers
US6953392B2 · kind B2 · utility
1Cited by
9References
40Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2001 |
| Grant date | Oct 11, 2005 |
| Priority date | — |
| Expiry date | May 16, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/6723
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated system for processing a plurality of wafers, having a conductive front surface, is provided. The system includes a plurality of processing subsystems for depositing on or removing metal from the front surfaces of the wafers. Each processing subsystem includes a process chamber and a cleaning chamber. The system also has a wafer handling subsystem for transporting each of the wafers into or out of the appropriate one of the plurality of processing subsystems. The plurality of processing subsystems and wafer handling subsystem form an integrated system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.