Fast dynamic mirror sense amplifier with separate comparison equalization and evaluation paths
US6954102B2 · kind B2 · utility
5Cited by
6References
7Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 3, 2003 |
| Grant date | Oct 11, 2005 |
| Priority date | — |
| Expiry date | May 3, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell sensing circuit to sense data from a memory cell includes a reference memory cell coupled to pass a reference current. A sense amplifier has a first input and a second input coupled to a bias circuit of the data memory cell. A first mirror mirrors the reference current to a voltage coupled to the first input of the sense amplifier. A second mirror mirrors the reference current to a voltage coupled to the bias circuit of the data memory cell. A third mirror mirrors the reference current to a voltage coupled to the second input of the sense amplifier through a pass gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.