Atomic layer deposition methods for forming a multi-layer adhesion-barrier layer for integrated circuits
US6955986B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 27, 2003 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Mar 27, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76871
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process produces a layer of material which functions as a copper barrier layer, adhesion layer and a copper seed layer in a device of an integrated circuit, particularly in damascene or dual damascene structures. The method includes a step of depositing a diffusion barrier layer over a dielectric, a step of depositing a layer of graded metal alloy of two or more metals, and a step of depositing a copper seed layer, which step is essentially a part of the step of depositing the alloy layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.