Wafer guides for processing semiconductor substrates
US6959823B2 · kind B2 · utility
8Cited by
19References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2003 |
| Grant date | Nov 1, 2005 |
| Priority date | — |
| Expiry date | Aug 7, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S134/902
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer guide includes a horizontal support panel and at least three vertical panels attached on one surface of the support panel. Each of the vertical panels has a vertical body panel and a plurality of protrusions upwardly extended from a top surface of the vertical body panel. Gap regions between the protrusions act as slots for holding wafers. Sidewalls of the slots have a convex shaped profile when viewed from a top view, and bottom surfaces of the slots also have a convex shaped profile when viewed from a cross sectional view that crosses the vertical panels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.