System and method for enabling weak consistent storage advantage to a firmly consistent storage architecture
US6963967B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2000 |
| Grant date | Nov 8, 2005 |
| Priority date | — |
| Expiry date | Apr 7, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of processing instructions in a data processing system. An instruction sequence that includes a memory access instruction is received at a processor in program order. In response to receipt of the memory access instruction a memory access request and a barrier operation are created. The barrier operation is placed on an interconnect after the memory access request is issued to a memory system. After the barrier operation has completed, the memory access request is completed in program order. When the memory access request is a load request, the load request is speculatively issued if a barrier operation is pending. Data returned by the speculatively issued load request is only returned to a register or execution unit of the processor when an acknowledgment is received for the barrier operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.