Method for fabricating a semiconductor structure
US6964912B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2003 |
| Grant date | Nov 15, 2005 |
| Priority date | — |
| Expiry date | Mar 24, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0385
Abstract
A method for fabricating a semiconductor structure includes providing a semiconductor substrate, providing a plurality of trenches in the semiconductor substrate using a first hard mask, and causing the hard mask to recede by a predetermined distance with respect to the trench wall at the top side of the semiconductor substrate for forming a first hard mask that has been caused to recede. An isolation trench structure is provided in the semiconductor substrate using a second hard mask, the isolation trench structure subdividing the first first hard mask that has been caused to recede along rows into strip sections and the strip sections of adjacent rows being arranged offset with respect to one another. The receding process results in a reduction of an overlap region between two strip sections of adjacent rows in comparison with an overlap region which would be present without the receding process. The second hard mask is removed and the isolation trench structure is filled and planarized with a filling material using the first hard mask subdivided into the strip sections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.