Semiconductor dice packages employing at least one redistribution layer
US6965160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2002 |
| Grant date | Nov 15, 2005 |
| Priority date | — |
| Expiry date | Aug 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for assembling and packaging semiconductor dice. The semiconductor dice or assemblies of stacked and electrically interconnected semiconductor dice are placed at mutually spaced locations with respect to a common plane and encapsulated in a dielectric material so that end portions of discrete conductive elements extending outwardly from each semiconductor die adjacent the common plane are exposed through an outer surface of the dielectric material. Redistribution lines are formed to extend from the exposed end portions of the discrete conductive elements to predetermined locations over the outer surface of the encapsulant which correspond with another interconnect outline, such as terminal pads of a printed circuit board, and conductive bumps formed at the predetermined locations. Encapsulated semiconductor dice or die stacks may be severed from the encapsulant to form individual packages, or laterally spaced semiconductor dice electrically interconnected by redistribution lines may be maintained together as a group in a single package or module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.