Divot reduction in SIMOX layers
US6967376B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2004 |
| Grant date | Nov 22, 2005 |
| Priority date | — |
| Expiry date | Apr 26, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76243
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a silicon-on-insulator (SOI) having a superficial Si-containing layer that has a reduced number of tile and divot defects is provided. The method includes the steps of: implanting oxygen ions into a surface of a Si-containing substrate, the implanted oxygen ions having a concentration sufficient to form a buried oxide region during a subsequent annealing step; and annealing the substrate containing implanted oxygen ions under conditions wherein the implanted oxygen ions form a buried oxide region which electrically isolates a superficial Si-containing layer from a bottom Si-containing layer. Moreover, the annealing conditions employed are capable of reducing the number of tile or divot defects present in the superficial Si-containing layer so as to allow optical detection of any other defect that has a lower density than the tile or divot defect. The present invention also relates to the SOI substrate that is produced using the inventive method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.