Semiconductor device, manufacturing method and apparatus for the same
US6969915B2 · kind B2 · utility
16Cited by
7References
69Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2002 |
| Grant date | Nov 29, 2005 |
| Priority date | — |
| Expiry date | Jan 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.