Patent · US Expired

Integrated memory

US6970389B2 · kind B2 · utility

1Cited by

3References

4Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Manfred Proell · Dorfen, DE
Stephan Schroeder · Munich, DE
Herbert Benzinger · Birkenfeld, DE
Aurel von Campenhausen · Munich, DE

Key dates

Filing date	Jan 15, 2004
Grant date	Nov 29, 2005
Priority date	—
Expiry date	May 15, 2024

Classification

Technology area (CPC G)Physics
CPC primaryG11C2207/005
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated memory can include a memory cell array, which has word lines for the selection of memory cells, bit lines for reading out or writing data signals of the memory cells, and a sense amplifier connected to bit lines of a bit line pair at one end of the bit line pair. In an activated state during a memory access, at least one activatable isolation circuit which is switched into one of the bit line pairs can isolate a part of the bit line pair, which is more remote from the sense amplifier from the sense amplifier. As a result, the effective capacitance of the bit lines can be significantly reduced during the memory access.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.