Activation plate for electroless and immersion plating of integrated circuits
US6974776B2 · kind B2 · utility
32Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2003 |
| Grant date | Dec 13, 2005 |
| Priority date | — |
| Expiry date | Jul 1, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10204
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a method of plating an integrated circuit. An activation plate is positioned adjacent to at least one integrated circuit. The integrated circuit includes a plurality of bond pads comprising a bond-pad metal, and the activation plate also comprises the bond-pad metal. A layer of electroless nickel is plated on the bond pads and the activation plate, and a layer of gold is plated over the layer of electroless nickel on the bond pads and the activation plate. An integrated circuit with bond pads plated using the activation plate, and a system for plating an integrated circuit is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.