Semiconductor constructions
US6977421B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2003 |
| Grant date | Dec 20, 2005 |
| Priority date | — |
| Expiry date | Apr 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/48
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention includes a DRAM array having a structure therein which includes a first material separated from a second material by an intervening insulative material. The first material is doped to at least 1×1017 atoms/cm3 with n-type and p-type dopant. The invention also includes a semiconductor construction in which a doped material is over a segment of a substrate. The doped material has a first type majority dopant therein, and is electrically connected with an electrical ground. A pair of conductively-doped diffusion regions are adjacent the segment, and spaced from one another by at least a portion of the segment. The conductively-doped diffusion regions have a second type majority dopant therein. The invention also encompasses methods of forming semiconductor constructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.