Carry ripple adder
US6978290B2 · kind B2 · utility
1Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2002 |
| Grant date | Dec 20, 2005 |
| Priority date | — |
| Expiry date | Nov 24, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/607
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A carry ripple adder contains five first inputs for accepting five input bits having equal significance w that are to be summed and two second inputs for accepting two carry bits having the significance w. It also contains an output for a sum bit having the significance w and two outputs for two carry bits having the significances 2w and 4w.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.