Epitaxially coated semiconductor wafer and process for producing it

US6995077B2 · kind B2 · utility

Assignee

• Siltronic AG · DE

Inventors

• Wolfgang Siebert · Mehring, DE
• Peter Storck · Mehring, DE

Key dates

• Filing date: Dec 9, 2003
• Grant date: Feb 7, 2006
• Expiry date: Dec 9, 2023

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/974
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor wafer with a front surface and a back surface and an epitaxial layer of semiconducting material deposited on the front surface, wherein the surface of the epitaxial layer has a maximum density of 0.14 localized light scatterers per cm2 with a cross section of greater than or equal to 0.12 μm, and the front surface of the semiconductor wafer, prior to the deposition of the epitaxial layer, has a surface roughness of 0.05 to 0.29 nm RMS, measured by AFM on a 1 μm×1 μm reference area. There is also a process for producing a semiconductor wafer with a front surface and a back surface and an epitaxial layer of semiconducting material deposited on the front surface. The process includes the following: (a) a stock removal polishing step as the only polishing step; (b) cleaning and drying of the semiconductor wafer; (c) pretreatment of the front surface of the semiconductor wafer at a temperature of from 950 to 1250 degrees Celsius in an epitaxy reactor; and (d) deposition of the epitaxial layer on the front surface of the pretreated semiconductor wafer.