Inventor · Mehring, DE

Peter Storck

12Patents
4h-index
26Co-inventors
56Inventor score

Filing activity: May 24, 2001 → Apr 30, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US7785706B2 Semiconductor wafer and process for its production Emerging Cross-Sectional Technologies 13 Active
US6995077B2 Epitaxially coated semiconductor wafer and process for producing it Emerging Cross-Sectional Technologies 8 Expired
US6630024B2 Method for the production of an epitaxially grown semiconductor wafer Chemistry; Metallurgy 8 Expired
US8268076B2 SOI wafers having MxOy oxide layers on a substrate wafer and an amorphous interlayer adjacent the substrate wafer Emerging Cross-Sectional Technologies 4 Active
US8093143B2 Method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side Emerging Cross-Sectional Technologies 4 Active
US7723214B2 Multilayer structure comprising a substrate and a layer of silicon and germanium deposited heteroepitaxially thereon, and a process for producing it Electricity 2 Active
US8115195B2 Semiconductor wafer with a heteroepitaxial layer and a method for producing the wafer Electricity 1 Active
US9691632B2 Epitaxial wafer and a method of manufacturing thereof Electricity 0 Active
US12313578B2 Method for producing semiconductor wafers Chemistry; Metallurgy 0 Active
US9923050B2 Semiconductor wafer and a method for producing the semiconductor wafer Electricity 0 Active
US10192739B2 Layered semiconductor substrate with reduced bow having a group III nitride layer and method for manufacturing it Electricity 0 Active
US6887775B2 Process and apparatus for epitaxially coating a semiconductor wafer and epitaxially coated semiconductor wafer Emerging Cross-Sectional Technologies 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.