Method for deep trench etching through a buried insulator layer
US6995094B2 · kind B2 · utility
0Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2003 |
| Grant date | Feb 7, 2006 |
| Priority date | — |
| Expiry date | Dec 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76283
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching a silicon on insulator (SOI) substrate includes opening a hardmask layer formed on an SOI layer, and etching through the SOI layer, a buried insulator layer underneath the SOI layer, and a bulk silicon layer beneath the buried insulator layer using a single etch step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.