High speed circuitized substrate with reduced thru-hole stub, method for fabrication and information handling system utilizing same
US6995322B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2004 |
| Grant date | Feb 7, 2006 |
| Priority date | — |
| Expiry date | Oct 1, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuitized substrate including a plurality of conductive and dielectric layers and also a plurality of conductive thru-holes therein for passing high speed signals, e.g., from one component to another mounted on the substrate. The substrate utilizes a signal routing pattern which uses the maximum length of each of the thru-holes wherever possible to thereby substantially eliminate signal loss (noise) due to thru-hole “stub” resonance. A multilayered circuitized substrate assembly using more than one circuitized substrate, an electrical assembly using a circuitized substrate and one or more electrical components, a method of making the circuitized substrate and an information handling system incorporating one or more circuitized substrate assemblies and attached components are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.