Wafer with a relaxed useful layer and method of forming the wafer
US7001826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2003 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Sep 17, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/933
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a useful layer (6) from a wafer (10), the wafer (10) comprising a supporting substrate (1) and a strained layer (2) that are chosen respectively from crystalline materials. The process includes a first step of forming a region of perturbation (3) in the supporting substrate (1) at a defined depth by creating structural perturbations that cause at least relative relaxation of the elastic strains in the strained layer (2). A second step of supplying energy causes at least relative relaxation of the elastic strains in the strained layer (2). A portion of the wafer (10) is removed from the opposite side from the relaxed strained layer (2′), the useful layer (6) being the remaining portion of the wafer (10). The present invention also relates to an application of the process and to wafers produced during the process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.