Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
US7002221B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2003 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Aug 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/177
Abstract
A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.