Methodology for the optimization of testing and diagnosis of analog and mixed signal ICs and embedded cores
US7003742B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2003 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Dec 3, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for analyzing an integrated circuit (IC) having at least one of the group consisting of digital and analog components, where the IC is designed to meet a plurality of circuit performance specifications, and fabrication of the IC is monitored by measuring process factors and a previously defined set of electrical test variables. A set of linearly independent electrical test parameters are formed based on a subset of the set of electrical test variables. The set of process factors is mapped to the linearly independent electrical test parameters. A plurality of figure-of-merit (FOM) performance models are formed based on the process factors. The FOM models are combined with the mapping to enable modeling of IC performance based on the linearly independent electrical test parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.