Structures and methods for enhancing capacitors in integrated circuits
US7009240B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2000 |
| Grant date | Mar 7, 2006 |
| Priority date | — |
| Expiry date | Jun 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0335
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Systems, devices, structures, and methods are described that inhibit dielectric degradation at high temperatures. An enhanced capacitor is discussed. The enhanced capacitor includes a first electrode, a dielectric that includes ditantalum pentaoxide, and a second electrode having a compound. The compound includes a first substance and a second substance. The second electrode includes a trace amount of the first substance. The morphology of the semiconductor structure remains stable when the trace amount of the first substance is oxidized during crystallization of the dielectric. In one embodiment, the crystalline structure of the dielectric describes substantially a (001) lattice plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.