Electro-static discharge protection circuit for dual-polarity input/output pad
US7012305B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2004 |
| Grant date | Mar 14, 2006 |
| Priority date | — |
| Expiry date | Feb 12, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/251
Abstract
An electro-static discharge (ESD) protection circuit for a dual polarity I/O pad is provided. The protection circuit includes a substrate of first type; a deep well region of second type disposed in the first type substrate; a well region of first type disposed in the second type deep well region; a first transistor disposed over the well region of first type, wherein the first transistor has a first source, a first gate and a first drain; a second transistor disposed over the substrate of first type, wherein the second transistor has a second source, a second gate and a second drain, and the second source is connected with the first drain, and both of them are disposed in a portion of the well region of first type, the deep well region of second type and the substrate of first type; a first doped region is disposed in the first type well region and laterally adjacent to the first source; a second doped region is disposed in the substrate of first type and laterally adjacent to the second drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.