MOS transistor in a single-transistor memory cell having a locally thickened gate oxide

US7012313B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Lars Heineck · Dresden, DE
• Giorgio Schweeger · Draveil, FR

Key dates

• Filing date: Jun 20, 2001
• Grant date: Mar 14, 2006
• Expiry date: Jun 20, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/516

Abstract

A MOS transistor in a single-transistor memory cell having a locally thickened gate oxide, and a process for producing the transistor. The MOS transistor can be used as a selection transistor in a single-transistor memory cell having nitride spacers, or another spacer material acting as an oxidation barrier. The transistor also has a bird's beak in the gate oxide to reduce leakage currents. The MOS transistor can be used in a DRAM, particularly as a selection transistor.