Magnetic memory cell with plural read transistors

US7012832B1 · kind B1 · utility

Assignees

• WESTERN DIGITAL (FREMONT), LLC · US
• STMicroelectronics SA

Inventors

• Kyusik Sin · Palo Alto, US
• Matthew R. Gibbons · San Jose, US
• William D. Jensen · Fremont, US
• Hugh C. Hiner · Fremont, US
• Xizeng Stone Shi · Fremont, US
• Roberto Bez · Milano, IT
• Giulio Casagrande · Vignate, IT
• Paolo Cappelletti · Seveso, IT

Key dates

• Filing date: Oct 31, 2003
• Grant date: Mar 14, 2006
• Expiry date: Oct 31, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C11/16
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A magnetic random access memory (MRAM) device has increased ΔR/R for sensing a state of a pin-dependent tunneling (SDT) device. The MRAM device includes plural transistors connected to a read line for sensing the state of the SDT device. Plural transistors lower an underlying resistance during reading, increasing ΔR/R. The plural transistors can share a source region.