Method of fabricating a semiconductor device package
US7013559B2 · kind B2 · utility
2Cited by
20References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2002 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Jul 21, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49222
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention features a novel design for forming a fiducial and pin one indicator that utilizes a single solder resist opening in a die mounting substrate to perform the combined functions of prior art fiducials and pin one indicators. Methods of fabricating a carrier substrate and fabricating a semiconductor device package using the combination pin one indicator and alignment fiducial of the present invention are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.