Method of simultaneously making a pair of transistors with insulated gates having respectively a thin oxide and a thick oxide, and corresponding integrated circuit comprising such a pair of transistors
US7015105B2 · kind B2 · utility
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9Claims
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Key dates
| Filing date | Oct 26, 2001 |
| Grant date | Mar 21, 2006 |
| Priority date | — |
| Expiry date | Feb 4, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of simultaneously fabricating a pair of insulated gate transistors respectively having a thin oxide and a thick oxide, and an integrated circuit including a pair of transistors of this kind. Forming low-doped NLDD areas of the thin oxide second transistor includes implanting a first dopant having a first concentration and implanting a second dopant having a second concentration lower than the first concentration. Forming low-doped areas NLDD of the first, thick oxide transistor includes only said implantation of the second dopant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.